1. Field of Invention
The invention relates to phase detectors and more specifically to an enhanced phase detector with an extended linear operating range.
2. Background
Numerous circuits employ phase detectors to determine the phase difference between two input signals. For example, phase locked loops (PLLs) are popular circuits which utilize a phase detector which compares the phase of two signals and generates a phase error signal. The phase detector in a PLL compares a reference signal with the output of a voltage controlled oscillator (possibly after passing through a frequency divider), and outputs a phase error signal. Typically, the phase error signal is filtered by a loop filter and fed into the voltage controlled oscillator, which generates a signal whose frequency varies based on the filtered phase error signal. The output signal of the voltage controlled oscillator is then fed back into the phase detector (via a frequency divider, if a frequency divider is utilized), completing a feedback loop. After an acquisition time, the reference signal and the output signal of the voltage controlled oscillator are equal in frequency and typically possess a small or zero phase offset. In such a state, the PLL is said to be in a “locked” condition, and the output signal of the voltage controlled oscillator is phase locked to the reference signal.
Numerous phase detectors possess a limited linear phase detection range, beyond which cycle slip occurs and degrades PLL acquisition time and modulation capability. As such, phase detectors, and applications comprising phase detectors, may benefit from an extended linear phase detection range.